注：可能对该芯片已经进行了若干完善，参数指标已经和已出版的勘误表有所出入。通过各种销售渠道克获悉各种芯片所做的修订。芯片勘误表请点击：/errata 。
概述
DS2482-800是 I 2C*线至1-Wire ®的桥接器件，可直接与标准(100kHz 最大值)或快速(400kHz 最大值) 的I 2C 主机连接，完成I 2C 主机和任意下游1-Wire 从器件之间的双向协议转换。相对于任何1-Wire 从 器件来说， DS2482-800是一个1-Wire 主机。经过工厂校准的内部定时器将系统主处理器从产生严格定时的1-Wire 波形中解脱出来，且同时支持标准和高速的1-Wire 通信速率。为了优化1-Wire 波形的产生，DS2482-800在1-Wire 的上升沿和下降沿进行了摆率控制，且该器件具有一个可编程的特性，以屏蔽某些1-Wire 从器件产生的快速应答脉冲沿。可编程的强上拉特性支持通过1-Wire 向1-Wire 从器件供电，诸如EEPROM 和传感器。DS2482-800将这些特性整合在一起，并提供8个独立的1-Wire I/O 通道。I 2C 从器件地址分配是由3个二进制地址输入控制的，以解决系统中其它I 2C 从器件的可能出现的地址冲突问题。 应用
无线
中心局交换机 PBX
机架服务器
特性
I 2C 主机接口，支持100kHz 和400kHz 的I 2C 通信 速率
带有可选的有源或无源1-Wire 上拉的1-Wire 主机 I/O
提供复位/在线应答、8位、1位和3位1-Wire I/O 时序
独立工作的8个1-Wire I/O 通道 标准和高速的1-Wire 通信速率 1-Wire 边沿控制摆率
可选的1-Wire 从器件应答脉冲下降沿屏蔽，以控 制1-Wire 总线上的快速边沿
为EEPROM 、温度传感器和其它具有瞬时大电流 模式的1-Wire 从器件提供低阻抗1-Wire 强上拉。 三个地址引脚用于I 2C 地址分配
宽工作范围：2.9V 至5.5V ，-40°C 至+85°C 16引脚SO 封装(150mil)
定购信息
PART TEMP RANGE PIN-PACKAGE
DS2482S-800 -40 to +85°C 16 SO (150mil ) DS2482S-800/T&R -40 to +85°C 16 SO (150mil )
DS2482-800
8通道 1-Wire 主控制器
*购买Maxim Integrated Products, Inc.或其从属授权关联公司的I 2C 产品，即得到了Philips I 2
95215232C 的专利许可、将这些产品用于符合Philips 定义的I 2
C 标准规范的系统。
1-Wire 是Dallas Semiconductor 的注册商标。
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground -0.5V, +6V
Maximum Current Into Any Pin ±20mA
Operating Temperature Range -40°C to +85°C
Junction Temperature
+150°C
Storage Temperature Range -55°C to +125°C
Soldering Temperature
See IPC/JEDEC J-STD-020A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device.
ELECTRICAL CHARACTERISTICS
(V CC = 2.9V to 5.5V, T A = -40°C to +85°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
3.3V 2.9 3.3 3.7
Supply Voltage V CC
5V 4.5 5.0 5.5
V
Operating Current I CC (Note 1) 0.75 mA
3.3V (Notes 2, 3) 1.9
1-Wire Input High V IH1 5V (Notes 2, 3) 3.4 V
3.3V (Notes 2, 3) 0.75
1-Wire Input Low叶轮加工
V IL1 5V (Notes 2, 3) 1.0 V
1-Wire Weak Pullup Resistor R WPU (Note 4) 800 1675 Ω 1-Wire Output Low V OL1 At 4mA load
0.4 V Standard (Notes 4, 16) 2.3 2.5 2.7 Active Pullup On Time t APUOT
Overdrive (Notes 4, 16) 0.4
0.5
0.6
µs
V CC ≥ 3.2V, 1.5mA load 0.3
Strong Pullup Voltage Drop ∆V STRPU
V CC ≥ 5.2 V, 3mA load 0.5 V
Standard (3.3V ±10%) 1 4.2
自控温伴热带3.3V Pulldown Slew Rate
(Note 6)
PD SRC Overdrive (3.3V ±10%) 5 22.1 V/µs
Standard (5.0V ±10%) 2 6.5
5V Pulldown Slew Rate (Note 6)
PD SRC Overdrive (5.0V ±10%) 10 40 V/µs
Standard (3.3V ±10%) 0.8 4
多媒体调度台3.3V Pullup Slew Rate (Note 6)PU SRC Overdrive (3.3V ±10%) 2.7 20 V/µs
Standard (5.0V ±10%) 1.3 6
5V Pullup Slew Rate (Note 6) PU SRC
Overdrive (5.0V ±10%)
3.4 31 V/µs
Power-On Reset Trip Point
V POR
2.2
V
1-Wire TIMING (Note 16) See Figures 3, 5, 6, and 7 Standard 7.6 8 8.4
Write 1/Read Low Time t W1L Overdrive 0.9 1 1.1 µs
Standard 13.3 14 15
Read Sample Time t MSR Overdrive 1.4 1.5 1.8 µs
Standard 65.8 69.3 72.8
1-Wire Time Slot t slot
Overdrive 9.9 10.5 11.0 µs
3.3V to 0V (Note 5) 0.54 3.0 Fall Time High-to-Low at Standard Speed (Note 6) 5.0V to 0V (Note 5) 0.55 2.2
3.3V to 0V (Note 5) 0.10 0.59 Fall Time High-to-Low at Overdrive Speed (Note 6)
t F1
5.0V to 0V (Note 5)
0.09
0.44
µs
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Standard 60 64 68
Write 0 Low Time t W0L
Overdrive 7.1 7.5 7.9 µs
Standard 5.0 5.3 5.6
Write 0 Recovery Time t REC0 Overdrive 2.8 3.0 3.2 µs
Standard 570 600 630
Reset Low Time
t RSTL Overdrive 68.4 72 75.6 µs
Standard 66.5 70 73.5
Presence-Detect Sample Time t MSP Overdrive 7.1 7.5 7.9 µs
Standard 7.6 8 8.4
Sampling for Short and
Interrupt t SI Overdrive 0.7 0.75 0.8 µs
Standard 554.8584 613.2
Reset High Time
t RSTH Overdrive 70.3 74 77.7
µs
Presence Pulse Mask Start t ppm1 (Note 7) 9.5 10 10.5 µs Presence Pulse Mask Stop t ppm2 (Note 7) 57 60 63 µs I²C-Pins (Note 8) See Figure 10
V CC = 2.9V to 3.7V
0.25 × V CC
LOW Level Input Voltage V IL
V CC = 4.5V to 5.5V
-0.5 0.22 × V CC V HIGH Level Input Voltage V IH 0.7 ×
V CC
V CC + 0.5V V Hysteresis of Schmitt Trigger Inputs
V hys
0.05 ×
V CC
V
LOW Level Output Voltage at 3mA Sink Current
V OL
0.4
V非晶硅薄膜电池
Output Fall Time from V Ihmin to V ILmax with a Bus Capacitance from 10pF to 400pF
t of 60 250 ns Pulse Width of Spikes that are Suppressed by the Input Filter t SP
SDA and SCL pins only
50
ns
Input Current Each I/O Pin with an Input Voltage Between 0.1V CCmax and 0.9V CCmax I i (Notes 9, 10) -10 10 µA Input Capacitance C i (Note 9)
10 pF SCL Clock Frequency
f SCL 0 400 kHz Hold Time (Repeated) START Condition. After this Period, the First Clock Pulse is Generated.t HD:STA 0.6
µs LOW Period of the SCL Clock t LOW 1.3 µs HIGH Period of the SCL Clock t HIGH 0.6 µs Setup Time for a Repeated START Condition t SU:STA
0.6 µs Data Hold Time t HD:DAT (Notes 11, 12)
0.9 µs Data Setup Time
t SU:DAT (Note 13) 250 ns Setup Time for STOP Condition t SU:STO 0.6
µs Bus Free Time Between a STOP and START Condition t BUF
1.3
µs
Capacitive Load for Each Bus Line
C b (Note 14) 400 pF Oscillator Warm-Up Time t OSCWUP (Note 15)
100
µs
Note 5: Fall time high to low (t F1) is derived from PD SRC, referenced from 0.9 × V CC to 0.1 × V CC .
灭苍蝇器Note 6: These values apply at full load, i. e., 1nF at standard speed and 0.3nF at Overdrive speed. For reduced load, the pulldown slew rate is slightly faster. Note 7: Presence pulse masking only applies to standard speed. Note 8: All I²C timing values are referred to V IHmin and V ILmax levels. Note 9: Applies to SDA, SCL, and AD0, AD1, AD2.
Note 10: I/O pins of the DS2482 do not obstruct the SDA and SCL lines if V CC is switched off.
Note 11: The DS2482 provides a hold time of at least 300ns for the SDA signal (referred to the V IHmin of the SCL signal) to bridge the undefined region of the falling edge of SCL.
Note 12: The maximum t HD :DAT has only to be met if the device does not stretch the LOW period (t LOW ) of the SCL signal.
Note 13:
A Fast-mode I²C-bus device can be used in a standard-mode I²C-bus system, but the requirement
t SU :DAT ≥250ns must then be met. This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tr max + t SU :DAT = 1000 + 250 = 1250ns (according to the standard-mode I²C-bus specification) before the SCL line is released.
Note 14: C B = total capacitance of one bus line in pF. If mixed with HS-mode devices, faster fall-times according to I²C-Bus Specification v2.1 are allowed.
Note 15: I²C communication should not take place for the max t OSCWUP time following a power-on reset. Note 16:
Except for t F1, all 1-Wire timing specifications and t APUOT are derived from the same timing circuit.
Therefore, if one of these parameters is found to be off the typical value, it is safe to assume that all of these parameters deviate from their typical value in the same direction and by the same degree.
引脚说明
Note 1: Operating current with 1-Wire write byte sequence followed by continuous Read of Status Register at 400KHz in Overdrive.
Note 2: With standard speed the total capacitive load of the 1-Wire bus should not exceed 1nF, otherwise the passive pullup on threshold V IL1 may not be reached in the available time. With Overdrive speed the capacitive load on the 1-Wire bus must not exceed 300pF.
Note 3: Active pullup guaranteed to turn on between V IL1MAX and V IH1MIN . Note 4: Active or resistive pullup choice is configurable.
引脚 名称 功能描述 1 IO3 1-Wire 总线#3的IO 驱动器 2 SCL I 2C 串行时钟输入，必须通过上拉电阻连接至VCC 3 SDA I 2C 串行数据输入/输出，必须通过上拉电阻连接至I 2C VCC 4 VCC 电源电压输入端 5 NC 悬空 6 AD2
7 AD1
8 AD0 I 2C 地址输入端；必须连接至VCC 或GND 。这些输入确定该器件的I 2C 地址。参见图9。9 IO7 1-Wire 总线#7通道的IO 驱动器 10 IO6 1-Wire 总线#6通道的IO 驱动器 11 IO5 1-Wire 总线#5通道的IO 驱动器 12 IO4 1-Wire 总线#4通道的IO 驱动器 13 GND 参考地 14 IO0 1-Wire 总线#0通道的IO 驱动器 15 IO1 1-Wire 总线#1通道的IO 驱动器 16 IO2 1-Wire 总线#2通道的IO 驱动器
图1. 结构框图
详细描述
DS2482-800是自定时8通道1-Wire控制器，支持高级的1-Wire波形特性，包括标准和高速的速率、有源上拉、电源供电的强上拉和应答脉冲屏蔽。一旦提供了命令和数据，DS2482的I/O控制器可实现严格定时的1-Wire通信功能，诸如复位/应答脉冲检测周期，读字节、写字节、单个读写位和三位一组的ROM搜索，而无需主机处理器参与。主机通过状态寄存器获得反馈（1-Wire功能完成状态、应答脉冲、1-Wire短路，选择的搜索路径），或通过数据寄存器读取数据。DS2482可以通过I2C数据寄存器实现在标准模式或高速模式下与主机处理器的通信。三个地址引脚（1通道版本器件具有2个地址引脚）的逻辑状态位确定DS2482的I2C从地址，允许最多8个器件工作在同一总线上，而无需网络集线器。 器件寄存器
DS2482有四个I2C主机读取的寄存器：通道选择寄存器、配置寄存器、状态寄存器和读数据寄存器。通过读指针对这些寄存器进行寻址。读指针的位置，也就是主机在随后的读访问中读取的寄存器是通过最后对DS2482执行的指令来定义的。主机读和写访问通道选择和配置寄存器来选择多个1-Wire通道的一个，并使能某些1-Wire特性。
