最近做了一些关于视频的工作,稍微研究了一下V4L2和硬件上的视频知识,其中包括了VGA、component、PAL等信号。在这里总结一下关于VGA信号波形方面的知识。
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在学习VGA的视频输出的时候,很容易就可以从网上到相关的引脚定义:生态石笼网箱
1 红视频信号(Red, 75 ohm, V p-p) 2?绿视频信号(Green, 75 ohm, V p-p)
3?蓝视频信号(Blue, 75 ohm, V p-p)
4显示器标识信号#2(Monitor ID Bit 2) 5地线(Gnd)
6红视频信号地线(Red Gnd)
7绿视频信号地线(Green Gnd)
8蓝视频信号地线(Blue Gnd)
9未连接(No Pin)
10?同步信号地线(Sync Gnd)
11?显示器标识信号#0(Monitor ID Bit 0)
12?显示器标识信号#1/SDA(Monitor ID Bit 1 or SDA)纹眉机
13??水平/复合同步信号(Horizontal Sync or Composite Sync)
14??垂直同步信号(Vertical Sync)
15??显示器标识信号#3/SCL(Monitor ID Bit 3 or SCL)
根据上面的定义,可以看出VGA其实就是将我们平常的3基数据放到了三根模拟信号线中传输。但是我以前错误地认为水平和垂直同步信号是必须的,但是在这次硬件设计的时候发现,一个TI的公板上的VGA只有3基信号和地,并且在软件调试的时候可以正常的让液晶显示器显示高清画面,所以上网搜索了一下,才发现了VGA的多种同步方式。
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VGA接口根据同步信号的不同可分为下列三种:
线同步(绿同步)
线同步(3基信号+复合同步信号)
线同步(3基信号+场行同步信号)
首先我先到了网上较为详细的一篇英文资料:VGA Signal information,大家可以先看看。
Introduction
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VGA is a high-resolution video standard used mostly for computer monitors, where ability to transmit a sharp, detailed image is essential. VGA uses separate wires to transmit the three color component signals and vertical and horizontal synchronization signals.
VGA Signals
Like any video format, VGA video is a stream of frames: each frame is made up of a series of horizontal lines, and each line is made up of a series of pixels. The lines in each
frame are transmitted in order from top to bottom (VGA is not interlaced), and the pixels in each line are transmitted from left to right. Separate horizontal and vertical synchronization signals are used to define the ends of each line and frame. A composite synchronization signal (actually an XOR of the horizontal and vertical signals) is also encoded on the green color channel.
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The ADV7125 video DAC reads an 8-bit value for each of the red, green, and blue channels on each cycle of the pixel clock. There is a two-cycle pipeline delay between when the digital codes are read by the DAC and when the corresponding analog voltages appear on the DAC outputs. The RGB input signals can be overridden by the sync and blank signals: The active low blank signal forces all three DAC outputs to their black level, while the active low sync signal forces the green DAC to a special sync level below the normal black level.
Each line of video begins with an active video region, in which RGB values are output for each pixel in the line. The active region is followed by a blanking region, in which black pi
xels are transmitted. In the middle of the blanking interval, a horizontal sync pulse is transmitted. The blanking interval before the sync pulse is known as the "front porch", and the blanking interval after the sync pulse is known as the "back porch". Note that the dedicated horizontal sync signal output from the FPGA directly to the VGA connector must be delayed by two clock cycles relative to the composite sync signal passed to the DAC chip, to account for the pipeline delay of the DAC.